Separate instruction encoding into a separate file.
I describe the intended file structure in comments at the top of each file.master
parent
b5667c61ec
commit
4e06f8d00f
GPG Key ID:
D6FB2F9892F9B225
2
Makefile
2
Makefile
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@ -6,7 +6,7 @@ SHELL = /bin/sh
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CFLAGS = -std=c99 -pedantic -Wextra -Os
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LDFLAGS = -lc
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OBJECTS = main.o asm.o io.o ir.o
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OBJECTS = asm.o io.o ir.o main.o x86encode.o
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.PHONY: passc
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passc: .bin $(OBJECTS)
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224
src/asm.c
224
src/asm.c
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@ -1,7 +1,13 @@
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// REFERENCES:
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// http://ref.x86asm.net/index.html (geek64-abc)
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// https://wiki.osdev.org/X86-64_Instruction_Encoding
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// https://defuse.ca/online-x86-assembler.htm
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/// This file handles the contextual generation of machine code.
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/// It abstracts over quirks like the limitations of addressing modes,
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/// provides higher-level functionality, and can perform peephole optimization.
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///
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/// Reserved registers:
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///
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/// * rsp: the stack pointer
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/// * rbp: the base of the stack frame
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/// * rax: the top of the stack
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/// * r13: a scratch register for compound instructions
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#include "asm.h"
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#include "io.h"
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@ -9,218 +15,16 @@
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#include <stdlib.h>
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#include <string.h>
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ip here;
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#define REX 0x40
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// REX prefix with 64-bit operands set
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#define REX_W 0x48
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#define REX_R 0x44
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#define REX_X 0x42
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#define REX_B 0x41
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#define REXQ_R(r) (REX | ((r >= R8) ? REX_R : 0))
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#define REXQ_B(r) (REX | ((r >= R8) ? REX_B : 0))
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// REX prefix including upper bit of register
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#define REXQ_WR(r) (REX_W | REXQ_R(r))
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#define REXQ_WRB(r, b) (REX_W | REXQ_R(r) | REXQ_B(b))
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// lower 3 bits of register (not including part encoded in REX)
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#define REG(r) (r & 7)
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#define MODRM_RR (3 << 6)
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#define MODRM_RM (0 << 6)
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#define MODRM_RD8 (1 << 6)
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#define MODRM_RD32 (2 << 6)
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#define MODRMQ(reg, rm) ((REG(reg) << 3) | REG(rm))
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#define MODRMQ_RR(reg, rm) (MODRM_RR | MODRMQ(reg, rm))
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#define MODRMQ_RM(reg, base) (MODRM_RM | MODRMQ(reg, base))
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#define MODRMQ_RD8(reg, base) (MODRM_RD8 | MODRMQ(reg, base))
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#define MODRMQ_RD32(reg, base) (MODRM_RD32 | MODRMQ(reg, base))
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static int32_t rel_offs(ip from, ip to) {
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// jumping through hoops to hopefully avoid UB
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int64_t off = (int64_t) to - (int64_t) from;
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if (off > INT32_MAX || off < INT32_MIN) {
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fprintf(stderr, "displacement greater than 32 bits!\n");
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fprintf(stderr, "if you ever encounter this error, let me know and I'll implement it.\n");
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exit(1);
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}
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return (int32_t) off;
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}
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static int32_t rip_rel(ip there) {
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return rel_offs(here, there);
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}
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#define JUMP_DISP8_SIZE 2
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static void inst_jump_disp8(uint8_t disp) {
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uint8_t inst[JUMP_DISP8_SIZE] = {
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0xeb, // jmp Jbs
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disp
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};
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emit(&inst, JUMP_DISP8_SIZE);
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}
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#define JUMP_DISP32_SIZE 5
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static void inst_jump_disp32(uint32_t disp) {
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emit_u8(0xe9); // jmp Jvds
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emit_u32(disp);
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}
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void inst_jump(ip there) {
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int32_t disp8 = rel_offs(here + JUMP_DISP8_SIZE, there);
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if (disp8 < INT8_MAX && disp8 > INT8_MIN) {
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inst_jump_disp8(disp8);
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} else {
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inst_jump_disp32(rel_offs(here + JUMP_DISP32_SIZE, there));
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}
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x86_inst_jmp_disp((int32_t) (there - here));
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// TODO: support 64-bit jumps?
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}
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ip inst_jump_unresolved(void) {
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inst_jump_disp32(0);
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x86_inst_jmp_disp32(0);
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return here;
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}
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void inst_jump_resolve(ip disp, ip there) {
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patch_i32(disp - 4, rel_offs(disp, there));
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}
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static void inst_mov_imm32(reg reg, uint32_t imm) {
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// mov Zvqp Ivqp
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if (reg >= R8) {
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emit_u8(REXQ_R(reg));
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}
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emit_u8(0xb8 + REG(reg));
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emit_u32(imm);
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}
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static void inst_mov_imm64(reg reg, uint64_t imm) {
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// mov Zvqp Ivqp
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uint8_t buf[10] = { REXQ_WR(reg), 0xb8 + REG(reg), 0, 0, 0, 0, 0, 0, 0, 0 };
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memcpy(&buf[2], &imm, sizeof(uint64_t));
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emit(buf, 10);
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}
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void inst_mov_imm(reg reg, uint64_t imm) {
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// TODO: emit `mov ax`, `mov al`, xor, xor+inc, xor+neg
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if (imm <= UINT32_MAX) {
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inst_mov_imm32(reg, (uint32_t) imm);
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} else {
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inst_mov_imm64(reg, imm);
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}
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}
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void inst_mov_imm_i64(reg reg, int64_t imm) {
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// TODO: emit sign extensions
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if (imm >= 0 && imm <= UINT32_MAX) {
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inst_mov_imm32(reg, (uint32_t) imm);
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} else {
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inst_mov_imm64(reg, (uint64_t) imm);
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}
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}
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static void check_base(reg base) {
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if (base == SP || base == BP || base == R12 || base == R13) {
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fprintf(stderr, "indirect addressing not implemented for sp & co\n");
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exit(1);
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}
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}
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void inst_mov(reg dest, reg src) {
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// mov Evqp Gvqp
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emit_u8(REXQ_WRB(dest, src));
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emit_u8(0x89);
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emit_u8(MODRMQ_RR(src, dest));
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}
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void inst_mov_from(reg dest, reg base) {
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check_base(base);
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// mov Gvqp Evqp
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emit_u8(REXQ_WRB(base, dest));
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emit_u8(0x8B);
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emit_u8(MODRMQ_RM(dest, base));
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}
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static void inst_mov_from_disp8(reg dest, reg base, int8_t disp) {
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check_base(base);
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// mov Gvqp Evqp
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emit_u8(REXQ_WRB(base, dest));
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emit_u8(0x8B);
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emit_u8(MODRMQ_RD8(dest, base));
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emit_u8(disp);
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}
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static void inst_mov_from_disp32(reg dest, reg base, int32_t disp) {
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check_base(base);
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// mov Gvqp Evqp
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emit_u8(REXQ_WRB(base, dest));
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emit_u8(0x8B);
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emit_u8(MODRMQ_RD32(dest, base));
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emit_u32((int32_t) disp);
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}
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void inst_mov_from_disp(reg dest, reg base, int32_t disp) {
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if (disp == 0) {
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inst_mov_from(dest, base);
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} else if (disp <= INT8_MAX && disp >= INT8_MIN) {
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inst_mov_from_disp8(dest, base, (int8_t) disp);
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} else {
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inst_mov_from_disp32(dest, base, disp);
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}
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}
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void inst_mov_to(reg base, reg src) {
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check_base(base);
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// mov Evqp Gvqp
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emit_u8(REXQ_WRB(base, src));
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emit_u8(0x89);
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emit_u8(MODRMQ_RR(base, src));
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}
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static void inst_mov_to_disp8(reg base, reg src, int8_t disp) {
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check_base(base);
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// mov Evqp Gvqp
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emit_u8(REXQ_WRB(base, src));
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emit_u8(0x89);
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emit_u8(MODRMQ_RD8(base, src));
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emit_u8(disp);
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}
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static void inst_mov_to_disp32(reg base, reg src, int32_t disp) {
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check_base(base);
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// mov Evqp Gvqp
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emit_u8(REXQ_WRB(base, src));
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emit_u8(0x89);
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emit_u8(MODRMQ_RD32(base, src));
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emit_u32((uint32_t) disp);
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}
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void inst_mov_to_disp(reg base, reg src, int32_t disp) {
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if (disp == 0) {
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inst_mov_to(base, src);
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} else if (disp <= INT8_MAX && disp >= INT8_MIN) {
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inst_mov_to_disp8(base, src, (int8_t) disp);
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} else {
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inst_mov_to_disp32(base, src, disp);
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}
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}
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void inst_syscall(void) {
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const uint8_t buf[2] = { 0x0f, 0x05 };
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emit(&buf, 2);
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}
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void inst_push(reg reg) {
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// push Zvq
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if (reg >= R8) {
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emit_u8(REX_B);
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}
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emit_u8(0x50 + REG(reg));
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}
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void inst_pop(reg reg) {
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// pop Zvq
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if (reg >= R8) {
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emit_u8(REX_B);
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}
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emit_u8(0x58 + REG(reg));
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patch_i32(disp - 4, (int32_t) (there - here));
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}
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24
src/asm.h
24
src/asm.h
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@ -1,34 +1,14 @@
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#ifndef _ASM_H
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#define _ASM_H
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#include "x86encode.h"
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#include <stddef.h>
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#include <stdint.h>
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typedef size_t ip;
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extern ip here;
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// A general-purpose x86 register.
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// The specific register size (e.g. al/ax/eax/rax) depends on the instruction.
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// All registers are valid for all instructions; we will perform exchanges if necessary.
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typedef enum reg {
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RA = 0, // rax, eax, ax, al
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RC = 1, // rcx, ecx, cx, cl
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RD = 2, // rdx, edx, dx, dl
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RB = 3, // rbx, ebx, bx, bl
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SP = 4, // rsp, esp, sp, spl (we do not use ah)
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BP = 5, // rbp, ebp, bp, bpl (we do not use ch)
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SI = 6, // rsi, esi, si, sil (we do not use dh)
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DI = 7, // rdi, edi, di, dil (we do not use bh)
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R8 = 8, // r8, r8d, r8w, r8l
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R9 = 9, // r9, r9d, r9w, r9l
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R10 = 10, // r10, r10d, r10w, r10l
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R11 = 11, // r11, r11d, r11w, r11l
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R12 = 12, // r12, r12d, r12w, r12l
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R13 = 13, // r13, r13d, r13w, r13l
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R14 = 14, // r14, r14d, r14w, r14l
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R15 = 15, // r15, r15d, r15w, r15l
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} reg;
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/// Jump to a known address.
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void inst_jump(ip there);
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21
src/io.c
21
src/io.c
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@ -1,4 +1,4 @@
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#ifdef __unix__
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#ifdef __linux__
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#define _GNU_SOURCE
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#endif
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@ -8,9 +8,10 @@
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#include <stdlib.h>
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#include <string.h>
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#ifdef __unix__
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// This program can be trivially converted to work with only the C standard library
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// at the cost of not being able to link the output file atomically.
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#ifdef __linux__
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// On Linux, we create a temporary output file using O_TMPFILE
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// so that the output file is never in a corrupt or incomplete state.
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// However, O_TMPFILE is not portable, so we only enable it on Linux.
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#include <fcntl.h>
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#include <libgen.h>
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#include <sys/stat.h>
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@ -20,8 +21,10 @@
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static const char* outfile_name;
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FILE* infile;
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FILE* outfile;
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// HACK: "here" tracking should be handled by the assembler, not IO.
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size_t here = 0;
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#ifdef __unix__
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#ifdef __linux__
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void open_files(const char* infile_name, const char* outfile_name_) {
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outfile_name = outfile_name_;
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// To avoid creating a corrupt or incomplete output file,
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@ -84,8 +87,10 @@ void open_files(const char* infile_name, const char* outfile_name) {
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exit(1);
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}
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// FIXME: portable temporary output file
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// There is no way for us to mark the file as executable.
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// Then again, if it's not Unix, that probably doesn't matter.
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// Then again, if it's not Linux, that probably doesn't matter,
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// because that's the only target platform we support.
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outfile = fopen(outfile_name, "wb");
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if (outfile == NULL) {
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fprintf(stderr, "failed to open output file: %s\n", strerror(errno));
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@ -94,6 +99,9 @@ void open_files(const char* infile_name, const char* outfile_name) {
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}
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void close_files(void) {
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// FIXME: set executable permission on unixen other than Linux
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// (relevant for e.g. the BSDs, some of which can transparently
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// emulate Linux executables.)
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if (fclose(outfile) != 0) {
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fprintf(stderr, "failed to close output file: %s\n", strerror(errno));
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// NOTE: ideally we'd do this on any dirty exit
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@ -113,6 +121,7 @@ void emit(const void* restrict ptr, size_t count) {
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fprintf(stderr, "failed to write to output file\n");
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exit(1);
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}
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here += count;
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}
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void emit_u8(uint8_t x) {
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1
src/io.h
1
src/io.h
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@ -6,6 +6,7 @@
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extern FILE* outfile;
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extern FILE* infile;
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extern size_t here;
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void open_files(const char* infile_name, const char* outfile_name);
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void close_files(void);
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30
src/ir.c
30
src/ir.c
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@ -1,8 +1,12 @@
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/// This file serves conceptually as the intermediate representation (IR)
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/// of the compiler. Compared to "asm", this file is aware of stack frames,
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/// control flow blocks and labels, compound types like structs and enums,
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/// and register allocation.
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#include "asm.h"
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#include "ir.h"
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#include <assert.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <stdlib.h>
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@ -69,7 +73,7 @@ static void reserve(size_t argc) {
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static var new_var(void) {
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var var = top_of_stack;
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top_of_stack++;
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inst_push(RA);
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x86_inst_push_r64(RA);
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return var;
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}
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@ -90,15 +94,15 @@ static void move(var dest, var src) {
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struct storage ds = storage(dest);
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struct storage ss = storage(src);
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if (ds.type == STORE_REG && ss.type == STORE_REG) {
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inst_mov(ds.reg, ss.reg);
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x86_inst_mov_r64_r64(ds.reg, ss.reg);
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} else if (ds.type == STORE_STACK && ss.type == STORE_REG) {
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inst_mov_to_disp(RB, ss.reg, ds.off);
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x86_inst_mov_m64_r64_disp(RB, ss.reg, ds.off);
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} else if (ds.type == STORE_REG && ds.type == STORE_STACK) {
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inst_mov_from_disp(ds.reg, RB, ss.off);
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x86_inst_mov_r64_m64_disp(ds.reg, RB, ss.off);
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} else {
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// FIXME: DI is scratch register?
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inst_mov_from_disp(DI, RB, ss.off);
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inst_mov_to_disp(RB, DI, ds.off);
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x86_inst_mov_r64_m64_disp(DI, RB, ss.off);
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x86_inst_mov_m64_r64_disp(RB, DI, ds.off);
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}
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}
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@ -195,7 +199,7 @@ var lit(uint64_t x) {
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var var = new_var();
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struct storage stg = storage(var);
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assert(stg.type == STORE_REG);
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inst_mov_imm(stg.reg, x);
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x86_inst_mov_r64_imm(stg.reg, x);
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return var;
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}
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@ -206,14 +210,14 @@ void syscall(size_t argc, var* args) {
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// FIXME: save args in case we don't want to sysexit
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// FIXME: save other registers
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if (argc > 1)
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inst_mov_from_disp(DI, RB, -args[1] * 8 - 16);
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x86_inst_mov_r64_m64_disp(DI, RB, -args[1] * 8 - 16);
|
||||
if (argc > 2)
|
||||
inst_mov_from_disp(SI, RB, -args[2] * 8 - 16);
|
||||
x86_inst_mov_r64_m64_disp(SI, RB, -args[2] * 8 - 16);
|
||||
if (argc > 3)
|
||||
inst_mov_from_disp(RD, RB, -args[3] * 8 - 16);
|
||||
inst_syscall();
|
||||
x86_inst_mov_r64_m64_disp(RD, RB, -args[3] * 8 - 16);
|
||||
x86_inst_syscall();
|
||||
}
|
||||
|
||||
void init(void) {
|
||||
inst_mov(RB, SP);
|
||||
x86_inst_mov_r64_r64(RB, SP);
|
||||
}
|
||||
|
|
|
|||
2
src/ir.h
2
src/ir.h
|
|
@ -44,4 +44,6 @@ var lit(uint64_t x);
|
|||
|
||||
void syscall(size_t argc, var* args);
|
||||
|
||||
void init(void);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,226 @@
|
|||
/// This file handles the (context-free) encoding of x86 instructions.
|
||||
/// It may substitute an instruction for a shorter one, but is unable to fuse instructions.
|
||||
|
||||
// REFERENCES:
|
||||
// http://ref.x86asm.net/index.html (geek64-abc)
|
||||
// https://wiki.osdev.org/X86-64_Instruction_Encoding
|
||||
// https://defuse.ca/online-x86-assembler.htm
|
||||
|
||||
#include "io.h"
|
||||
#include "x86encode.h"
|
||||
|
||||
#define REX 0x40
|
||||
// REX prefix with 64-bit operands set
|
||||
#define REX_W 0x48
|
||||
#define REX_R 0x44
|
||||
#define REX_X 0x42
|
||||
#define REX_B 0x41
|
||||
|
||||
// lower 3 bits of register (not including part encoded in REX)
|
||||
#define REG(r) (r & 7)
|
||||
|
||||
#define MODRM_RR (3 << 6)
|
||||
#define MODRM_RM (0 << 6)
|
||||
#define MODRM_RM8 (1 << 6)
|
||||
#define MODRM_RM32 (2 << 6)
|
||||
|
||||
static void x86_opt_rexr(reg reg) {
|
||||
if (reg >= R8) {
|
||||
emit_u8(REX | REX_R);
|
||||
}
|
||||
}
|
||||
|
||||
static void x86_rexwr(reg reg) {
|
||||
uint8_t rex = REX | REX_W;
|
||||
if (reg >= R8) rex |= REX_R;
|
||||
emit_u8(rex);
|
||||
}
|
||||
|
||||
static void x86_rexwrb(reg r, reg b) {
|
||||
uint8_t rex = REX | REX_W;
|
||||
if (r >= R8) rex |= REX_R;
|
||||
if (b >= R8) rex |= REX_B;
|
||||
emit_u8(rex);
|
||||
}
|
||||
|
||||
static void x86_modrr(reg r, reg b) {
|
||||
emit_u8(MODRM_RR | (REG(r) << 3) | REG(b));
|
||||
}
|
||||
|
||||
static void x86_modrm(reg r, reg b) {
|
||||
emit_u8(MODRM_RM | (REG(r) << 3) | REG(b));
|
||||
}
|
||||
|
||||
static void x86_modrm8(reg r, reg b) {
|
||||
emit_u8(MODRM_RM8 | (REG(r) << 3) | REG(b));
|
||||
}
|
||||
|
||||
static void x86_modrm32(reg r, reg b) {
|
||||
emit_u8(MODRM_RM32 | (REG(r) << 3) | REG(b));
|
||||
}
|
||||
|
||||
static void x86_enc_opr(uint8_t op, reg reg) {
|
||||
x86_opt_rexr(reg);
|
||||
emit_u8(op + REG(reg));
|
||||
}
|
||||
|
||||
static void x86_enc_rexw_opr(uint8_t op, reg reg) {
|
||||
x86_rexwr(reg);
|
||||
emit_u8(op + REG(reg));
|
||||
}
|
||||
|
||||
static void x86_enc_opr_imm32(uint8_t op, reg reg, uint32_t imm) {
|
||||
x86_opt_rexr(reg);
|
||||
emit_u8(op + REG(reg));
|
||||
emit_u32(imm);
|
||||
}
|
||||
|
||||
static void x86_enc_rexw_opr_imm32(uint8_t op, reg reg, uint32_t imm) {
|
||||
x86_rexwr(reg);
|
||||
emit_u8(op + REG(reg));
|
||||
emit_u32(imm);
|
||||
}
|
||||
|
||||
static void x86_enc_rexw_opr_imm64(uint8_t op, reg reg, uint64_t imm) {
|
||||
x86_rexwr(reg);
|
||||
emit_u8(op + REG(reg));
|
||||
emit_u64(imm);
|
||||
}
|
||||
|
||||
static void x86_enc_rexw_modrr(uint8_t op, reg r, reg m) {
|
||||
x86_rexwrb(r, m);
|
||||
emit_u8(op);
|
||||
x86_modrr(r, m);
|
||||
}
|
||||
|
||||
static void x86_enc_rexw_modrm(uint8_t op, reg r, reg b) {
|
||||
x86_rexwrb(r, b);
|
||||
emit_u8(op);
|
||||
x86_modrm(r, b);
|
||||
}
|
||||
|
||||
static void x86_enc_rexw_modrm8(uint8_t op, reg r, reg b, int8_t disp) {
|
||||
x86_rexwrb(r, b);
|
||||
emit_u8(op);
|
||||
x86_modrm8(r, b);
|
||||
emit_u8(disp);
|
||||
}
|
||||
|
||||
static void x86_enc_rexw_modrm32(uint8_t op, reg r, reg b, int32_t disp) {
|
||||
x86_rexwrb(r, b);
|
||||
emit_u8(op);
|
||||
x86_modrm32(r, b);
|
||||
emit_u32(disp);
|
||||
}
|
||||
|
||||
static void x86_enc_rexw_modrmd(uint8_t op, reg r, reg b, int32_t disp) {
|
||||
if (disp == 0 && b != BP && b != R13) {
|
||||
x86_enc_rexw_modrm(op, r, b);
|
||||
} else if (disp >= INT8_MIN && disp <= INT8_MAX) {
|
||||
x86_enc_rexw_modrm8(op, r, b, (int8_t) disp);
|
||||
} else {
|
||||
x86_enc_rexw_modrm32(op, r, b, disp);
|
||||
}
|
||||
}
|
||||
|
||||
static void x86_enc_disp8(uint8_t op, int8_t disp) {
|
||||
uint8_t buf[2] = { op, (uint8_t) disp };
|
||||
emit(buf, 2);
|
||||
}
|
||||
|
||||
static void x86_enc_disp32(uint8_t op, int32_t disp) {
|
||||
emit_u8(op);
|
||||
emit_u32((uint32_t) disp);
|
||||
}
|
||||
|
||||
void x86_inst_mov_r64_imm64(reg dest, uint64_t imm) {
|
||||
x86_enc_rexw_opr_imm64(0xb8, dest, imm);
|
||||
}
|
||||
|
||||
void x86_inst_mov_r64_imm32(reg dest, uint32_t imm) {
|
||||
x86_enc_opr_imm32(0xb8, dest, imm);
|
||||
}
|
||||
|
||||
void x86_inst_mov_r64_imm(reg dest, uint64_t imm) {
|
||||
// TODO: xor if 0, use inc and dec, 16-bit and 8-bit immediates
|
||||
if (imm <= UINT32_MAX) {
|
||||
x86_inst_mov_r64_imm32(dest, (uint32_t) imm);
|
||||
} else {
|
||||
x86_inst_mov_r64_imm64(dest, imm);
|
||||
}
|
||||
}
|
||||
|
||||
void x86_inst_mov_r64_imms(reg dest, int64_t imm) {
|
||||
// TODO: sign-extend
|
||||
if (imm >= 0) {
|
||||
x86_inst_mov_r64_imm(dest, imm);
|
||||
} else {
|
||||
x86_inst_mov_r64_imm64(dest, (int64_t) imm);
|
||||
}
|
||||
}
|
||||
|
||||
void x86_inst_mov_r64_r64(reg dest, reg src) {
|
||||
x86_enc_rexw_modrr(0x8b, dest, src);
|
||||
}
|
||||
|
||||
void x86_inst_mov_r64_m64(reg dest, reg src) {
|
||||
x86_enc_rexw_modrm(0x8b, dest, src);
|
||||
}
|
||||
|
||||
void x86_inst_mov_r64_m64_disp8(reg dest, reg src, int8_t disp) {
|
||||
x86_enc_rexw_modrm8(0x8b, dest, src, disp);
|
||||
}
|
||||
|
||||
void x86_inst_mov_r64_m64_disp32(reg dest, reg src, int32_t disp) {
|
||||
x86_enc_rexw_modrm32(0x8b, dest, src, disp);
|
||||
}
|
||||
|
||||
void x86_inst_mov_r64_m64_disp(reg dest, reg src, int32_t disp) {
|
||||
x86_enc_rexw_modrmd(0x8b, dest, src, disp);
|
||||
}
|
||||
|
||||
void x86_inst_mov_m64_r64(reg dest, reg src) {
|
||||
x86_enc_rexw_modrm(0x8a, src, dest);
|
||||
}
|
||||
|
||||
void x86_inst_mov_m64_r64_disp8(reg dest, reg src, int8_t disp) {
|
||||
x86_enc_rexw_modrm8(0x8a, src, dest, disp);
|
||||
}
|
||||
|
||||
void x86_inst_mov_m64_r64_disp32(reg dest, reg src, int32_t disp) {
|
||||
x86_enc_rexw_modrm32(0x8a, src, dest, disp);
|
||||
}
|
||||
|
||||
void x86_inst_mov_m64_r64_disp(reg dest, reg src, int32_t disp) {
|
||||
x86_enc_rexw_modrmd(0x8a, src, dest, disp);
|
||||
}
|
||||
|
||||
void x86_inst_push_r64(reg reg) {
|
||||
x86_enc_opr(0x50, reg);
|
||||
}
|
||||
|
||||
void x86_inst_pop_r64(reg reg) {
|
||||
x86_enc_opr(0x58, reg);
|
||||
}
|
||||
|
||||
void x86_inst_jmp_disp8(int8_t disp) {
|
||||
x86_enc_disp8(0xeb, disp);
|
||||
}
|
||||
|
||||
void x86_inst_jmp_disp32(int32_t disp) {
|
||||
x86_enc_disp32(0xe9, disp);
|
||||
}
|
||||
|
||||
void x86_inst_jmp_disp(int32_t disp) {
|
||||
int32_t disp8 = disp + X86_JMP_DISP8_SIZE;
|
||||
if (disp8 >= INT8_MIN && disp8 <= INT8_MAX) {
|
||||
x86_inst_jmp_disp8((int8_t) disp8);
|
||||
} else {
|
||||
x86_inst_jmp_disp32(disp + X86_JMP_DISP32_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
void x86_inst_syscall(void) {
|
||||
const uint8_t buf[2] = { 0x0f, 0x05 };
|
||||
emit(buf, 2);
|
||||
}
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
#ifndef _X86ENCODE_H
|
||||
#define _X86ENCODE_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
// A general-purpose x86 register.
|
||||
// The specific register size (e.g. al/ax/eax/rax) depends on the instruction.
|
||||
// All registers are valid for all instructions; we will perform exchanges if necessary.
|
||||
typedef enum reg {
|
||||
RA = 0, // rax, eax, ax, al
|
||||
RC = 1, // rcx, ecx, cx, cl
|
||||
RD = 2, // rdx, edx, dx, dl
|
||||
RB = 3, // rbx, ebx, bx, bl
|
||||
SP = 4, // rsp, esp, sp, spl (we do not use ah)
|
||||
BP = 5, // rbp, ebp, bp, bpl (we do not use ch)
|
||||
SI = 6, // rsi, esi, si, sil (we do not use dh)
|
||||
DI = 7, // rdi, edi, di, dil (we do not use bh)
|
||||
R8 = 8, // r8, r8d, r8w, r8l
|
||||
R9 = 9, // r9, r9d, r9w, r9l
|
||||
R10 = 10, // r10, r10d, r10w, r10l
|
||||
R11 = 11, // r11, r11d, r11w, r11l
|
||||
R12 = 12, // r12, r12d, r12w, r12l
|
||||
R13 = 13, // r13, r13d, r13w, r13l
|
||||
R14 = 14, // r14, r14d, r14w, r14l
|
||||
R15 = 15, // r15, r15d, r15w, r15l
|
||||
} reg;
|
||||
|
||||
|
||||
void x86_inst_mov_r64_imm64(reg dest, uint64_t imm);
|
||||
void x86_inst_mov_r64_imm32(reg dest, uint32_t imm);
|
||||
void x86_inst_mov_r64_imm(reg dest, uint64_t imm);
|
||||
void x86_inst_mov_r64_imms(reg dest, int64_t imm);
|
||||
void x86_inst_mov_r64_r64(reg dest, reg src);
|
||||
void x86_inst_mov_r64_m64(reg dest, reg src);
|
||||
void x86_inst_mov_r64_m64_disp8(reg dest, reg src, int8_t disp);
|
||||
void x86_inst_mov_r64_m64_disp32(reg dest, reg src, int32_t disp);
|
||||
void x86_inst_mov_r64_m64_disp(reg dest, reg src, int32_t disp);
|
||||
void x86_inst_mov_m64_r64(reg dest, reg src);
|
||||
void x86_inst_mov_m64_r64_disp8(reg dest, reg src, int8_t disp);
|
||||
void x86_inst_mov_m64_r64_disp32(reg dest, reg src, int32_t disp);
|
||||
void x86_inst_mov_m64_r64_disp(reg dest, reg src, int32_t disp);
|
||||
void x86_inst_push_r64(reg reg);
|
||||
void x86_inst_pop_r64(reg reg);
|
||||
#define X86_JMP_DISP8_SIZE 2
|
||||
void x86_inst_jmp_disp8(int8_t disp);
|
||||
#define X86_JMP_DISP32_SIZE 5
|
||||
void x86_inst_jmp_disp32(int32_t disp);
|
||||
void x86_inst_jmp_disp(int32_t disp);
|
||||
void x86_inst_syscall(void);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue